1. Field of the Invention
The present invention relates to a radio integrated circuit (hereinafter, referred to as “radio LSI”) compatible with ZigBee (ZigBee Alliance's registered trademark), one of the near-distance radio communication technology standards that the physical layer interface conforms to IEEE (Institute of Electrical and Electronic Engineers) 802.15.4 and the 2.4 GHz frequency band, similar to IEEE 802.11b of the radio LAN (local area network) standard, is utilized by segmented into 16 channels, and more particularly to a technique for controlling the reception data thereof.
2. Description of the Related Art
FIG. 1 shows a communication hierarchical model of ZigBee.
The lowermost physical layer 1, for sending/receiving actual data, defines an applicable radio frequency, modulation scheme, data rate and the like. A data-link layer 2, for sending/receiving data through the physical layer 1, has a media access control (MAC) layer and defines a format, etc. of transmission/reception data. Those physical layer 1 and data-link layer 2 conform to IEEE802.15.4.
A network layer 3 is for data transfer management at between two nodes connected over the network. A transport layer 4 is for communication management while a session layer 5 is for management of communication at from a beginning to end thereof. Meanwhile, a presentation layer 6 is for an interface management of between an application layer 7 and the session layer 5 that are to perform an actual data processing.
FIG. 2 shows a format of the data to be sent/received at the physical layer 1.
The beginning 4 bytes are of a preamble (Preamble-Sequence) to take a synchronism upon reception, which is followed by 1-byte transfer start information (Start of Frame Delimiter) and 1-byte frame length information (Frame-Length). The frame length information represents a length of the subsequent data (bytes). Following the frame length information, frame control information (Frame-Control) representative of a data type continues 2 bytes. Following the frame control information, a sequence number (Sequence-Number) continues 1 byte and further continued by address and data fields (Address-Field, Data-Payload) that are variable in length. In the last of the data field, there is added 2-byte error check information (FCS: Frame-Check-Sequence).
FIG. 3 shows a data structure of the frame control information in FIG. 2.
The frame control information is structured with 2-bit frame type (Frame-Type), 1-bit security permission (Security-enable), 1-bit frame pending (Frame-Pending), 1-bit acknowledgement request, 1-bit intra-PAN (Intra-PAN), 2-bit destination addressing mode (Dest-Addressing-Mode) and 2-bit source addressing mode (Source-Addressing-Mode). The other bits are undefined (Reserved).
The frame type is representative of which one of beacon, data, response signal and command the present frame is. The security permission represents whether or not to send/receive data by ciphering. The frame pending represents whether or not to send data subsequently when sending an acknowledgement, referred later. The acknowledgement request is representative of whether or not to request an acknowledgement of data to the opposite-of-communication the data has been sent. The intra-PAN, the destination addressing mode and the source addressing mode are to designate a representation form, i.e. data length and structure, of the FIG. 2 Address-Field. For example, in an addressing mode, designated is a segmented bit number (16 bits or 64 bits) for use in addressing.
FIG. 4 shows a data structure of the FIG. 2 address field.
The address field is structured with 0- or 2-byte destination-PAN identifying information (Destination-PAN-identifier), 0-, 2- or 8-byte destination address (Destination-Address), 0- or 2-byte source-PAN identifying information (Source-PAN-identifier), and 0-, 2- or 8-byte source address (Source-Address). Those pieces of identifier information and addressing byte number are to be designated by the intra-PAN, destination addressing mode and source addressing mode of the frame control information.
FIG. 5 shows a structure of acknowledgement data.
The acknowledgement data is to be responded to the sender from the receiver when receiving data in the case acknowledgement is requested for the data from the sender. This has 1-byte data length (Length), 2-byte frame control information (Frame-Control), 1-byte sequence number (Sequence-Number) and 2-byte error check information (FCS). The Frame control information has the same data structure as that of the frame control information in FIG. 2, that is, the frame control information detailed in FIG. 3.
The radio LSIs for ZigBee are different in LSI specification depending upon with what functional bocks is configured the physical layer 1, data link layer 2 and network layer 3 in the FIG. 2 communication hierarchical mode. For example, in a radio LSI comparatively small in scale, an IC chip is made with only a radio sending/receiving section formed by an analog radio circuit for sending/receiving a radio-frequency signal and a physical layer wherein the processing in the data-link layer or higher is on software by means of a central processing unit (hereinafter, referred to as “CPU”) on the host side. Meanwhile, Oki Technical Review, Oki Electric, 2004.10.1, vol. 71, No. 4, p. 24-29 (Non-patent Document 1), describes an art that a chip is made with up to a MAC layer of the radio sending/receiving section, physical later and data-link layer, to realize a radio LSI conforming to IEEE802.15.4 so that a ZigBee network can be controlled by a low-competent host CPU by performing a complicated MAC processing within the radio LSI.
In any of radio LSIs, data transmission/reception is controlled in the physical layer 1 while reception data is analyzed in the data-link layer 2, thus enabling data transmission/reception with a host-side CPU according to a designated transfer mode.
FIG. 6 is a configuration diagram of the conventional ZigBee reception circuit.
The reception circuit has a radio-frequency part 11 for converting a radio-frequency signal RF received at the antenna into a base-band signal, a demodulating part 12 for converting the base-band signal into symbol data, a physical-layer part 13 for converting symbol data into byte data and controlling data transmission/reception, a data-link section 14 for analyzing the data provided from the physical layer part 13 and ciphering it as required, and a network section 15 for sending/receiving data with the host-side CPU.
FIG. 7 shows a process flow of reception data on the reception circuit in FIG. 6.
At step S1, the data of the radio-frequency signal RF received at the radio-frequency part 11 is converted into a base-band signal and then, at step S2, converted into symbol data by the modulating part 12.
At step S3, the symbol data is converted into byte data by the physical layer part 13 (one symbol received at an interval of 16 μs, two symbols constituting 1-byte data). The reception data, converted into byte data, is held until data is gathered in an amount of one frame, and then delivered to the data-link section 14.
At step S4, the reception data is analyzed by the data-link section 14.
At first, the address field (see FIG. 4) items are decoded as to data length and structure depending upon the Intra-PAN, destination addressing mode and source addressing mode of the frame control information (see FIG. 3).
Then, it is determined whether or not the data is destined for the circuit of its own, depending upon the destination-PAN identifying information and destination address in the address field. When the data is destined for the circuit of its own, reference is made to source-PAN identifying information, source address and a previously registered database, to determine whether or not there is a setting in a security mode.
When there is no setting of a security mode, the reception data is delivered, as it is, to the network section 15. When there is a setting of a security mode, the reception data is decoded by setting up necessary data for encryption/decryption and then delivered to the network section 15.
Furthermore, it is examined whether or not there is a setting of acknowledgement request in the frame control information. When there is a setting of acknowledgement request, response is made with a frame containing acknowledgement data (see FIG. 5) to the sender. At this time, in the case of outputting data subsequently to outputting of acknowledgement data, frame pending (see FIG. 3) is set up in the frame control information of the acknowledgement data and then sent.
At step S5, the reception data is sent from the network section 15 to the host-side CPU.